1. Field of the Invention
The present invention relates to an integrated circuit device comprising at least a central processing unit, a bus control circuit, and an inspection control circuit, and a method and an apparatus for inspecting such an integrated circuit device.
2. Description of the Related Art
Heretofore, a system called an ICE (In-Circuit Emulator) has been used to inspect internal operations of integrated circuit devices constructed as single chips. The ICE system reads all input and output signals of an integrated circuit device to emulate internal operations thereof. Therefore, the ICE system is capable of debugging an integrated circuit device while it is in a development stage.
The ICE system is required to connect its connection terminals individually to all the input and output terminals of an integrated circuit device to be inspected, therefore it is difficult to use the ICE system to inspect an integrated circuit device when it is mounted on a circuit board. To eliminate such a drawback, there has been proposed an integrated circuit device incorporating a built-in inspection control circuit which is capable of debugging the integrated circuit device while it is mounted on a circuit board.
One conventional integrated circuit device with such a built-in inspection control circuit will be described below with reference to FIG. 1 of the accompanying drawings. FIG. 1 shows in block form an internal structure of a conventional integrated circuit device. As shown in FIG. 1, the integrated circuit device, generally designated by 100, has a CPU (Central Processing Unit) core 1 connected by a dedicated internal bus 2 to a BCU (Bus Control Unit) 3 which is connected to a main bus 4.
The integrated circuit device 100 also has various peripheral circuits 5 connected to the main bus 4. A number of lead terminals 7 are connected through the main bus 4 to the CPU core 1, the BCU 3, and the peripheral circuits 5. The integrated circuit device 100 further includes a DCU (Debug Control Unit) 6 as an inspection control circuit independent of the main bus 4. The DCU 6 has a plurality of boundary scan cells 8 connected respectively to a plurality of lead terminals 10 serving as an inspection information I/F (Interface) 9 of JTAG (Joint Test Action Group).
Boundary scan cells 8 are also connected individually to the lead terminals 7. The boundary scan cells 8 connected to the lead terminals 7 are connected in a loop pattern from one of the boundary scan cells 8 of the DCU 6 to the other boundary scan cell 8 of the DCU 6.
The integrated circuit device 100 of the above structure, even when it is mounted on a circuit board (not shown) desired by the user, can be debugged by a boundary scan test. For debugging the integrated circuit device 100, a debugging connector is mounted on the circuit board, and the inspection information I/F 9 of the integrated circuit device 100 mounted on the circuit board is connected to the debugging connector.
The lead terminals 7 other than the inspection information I/F 9 of the integrated circuit device 100 are connected respectively to necessary leads on the circuit board. When an ordinary mode is established as an operation mode of the integrated circuit device 100, since the boundary scan cells 8 connected individually to the lead terminals 7 pass communication data without changing it, the CPU core 1, etc. of the integrated circuit device 100 can communicate with the leads on the circuit board through the lead terminals 7.
When the connector of a circuit inspection device (not shown) is connected to the connector on the circuit board and the operation mode of the integrated circuit device 100 is switched to a test mode, bus cycles of the CPU core 1 are stopped at a certain time, and the boundary scan cells 8 form a shift register.
Now, communication data including addresses and commands which the CPU core 1, etc. communicate through the lead terminals 7 can be replaced and acquired by the DCU 6 through the shift register made up of the boundary scan cells 8. Because the boundary scan cells 8 are connected to the circuit inspection device through the inspection information I/F 9, the circuit inspection device can inspect internal operations of the integrated circuit device 100.
Another conventional integrated circuit device with such a built-in inspection control circuit will be described below with reference to FIG. 2 of the accompanying drawings. FIG. 2 shows in block form an internal structure of the integrated circuit device. Those parts shown in FIG. 2 which are identical to those of the conventional integrated circuit device shown in FIG. 1 are identically referred to, and will not be described in detail below.
The integrated circuit device, generally designated by 200, has a CPU core 21 connected by a dedicated internal bus 22 to a BCU 23 which is connected to a main bus 24. To the main bus 24, there are connected various peripheral circuits 25 and a DCU 26 as an inspection control circuit. A number of lead terminals 27 are connected through the main bus 24 to the CPU core 21, the BCU 23, and the peripheral circuits 25.
Unlike the integrated circuit device 100, the DCU 26 has a DMA (Direct Memory Access) controller 28 that is directly connected to the main bus 24. To the DCU 26, there are connected a plurality of lead terminals 30 as an inspection information I/F 29 of JTAG, which are connected to the DMA controller 28.
The DCU 26 has no boundary scan cells, and the lead terminals 27 have no boundary scan cells either. Various I/O (Input/Output) ports 31 and a memory 32 as an information storage medium on a circuit board (not shown) are connected to the lead terminals 27 which are connected directly to the BCU 23. The memory 32 stores, for example, instruction codes and processed data which are to be read by the integrated circuit device 200.
A debugging connector is mounted on a circuit board prepared by the user, and the inspection information I/F 29 of the integrated circuit device 200 mounted on the circuit board is connected to the debugging connector. In an ordinary mode, data communications with the peripheral circuits 25 through the main bus 24 are controlled by the CPU core 21 through the BCU 23.
When the connector of a circuit inspection device (not shown) is connected to the connector on the circuit board and a test mode is started for the integrated circuit device 200, the DCU 26 can directly access the peripheral circuits 25 from the main bus 24 without being routed through the BCU 23 due to a DMA function of the DMA controller 28. Therefore, the circuit inspection device can inspect internal operations of the integrated circuit device 200.
Consequently, the integrated circuit devices 100, 200 can be inspected for their internal operations while being mounted on the circuit board that the user has prepared.
However, the integrated circuit device 100 with the boundary scan cells cannot easily be controlled because bus cycles of the CPU core 1 need to be stopped at an appropriate time for inspecting internal operations of the integrated circuit device 100, and communication data is replaced and acquired through the shift register made up of the boundary scan cells 8.
Because the boundary scan cells 8 which make up the shift register need to be connected individually to the lead terminals 7, the integrated circuit device 100 is relatively complex in structure and large in size. The boundary scan cells 8 connected individually to the lead terminals 7 can basically be used only for the boundary cell test, and hence are not highly versatile in nature.
With the integrated circuit device 200 based on the DMA principles, the DCU 26 directly accesses the peripheral circuits 25 and the BCU 23 without being routed through the CPU core 21 due to a DMA function of the DMA controller 28. It is difficult for the DCU 26 to access an internal register of the CPU core 21. If the DCU 26 is to be allowed to access the internal register of the CPU core 21, then it is necessary to modify the CPU core 21 extensively. Such a modification process is tedious and time-consuming, and the modified CPU core 21 would have lowered compatibility with the peripheral circuits and other circuits.
It is an object of the present invention to provide an integrated circuit device whose internal operations can easily be inspected while being mounted on a circuit board, and a method of and an apparatus for inspecting such an integrated circuit device.
According to the present invention, an integrated circuit device has an inspection information interface for detachable connection to an external circuit inspection device, an inspection control circuit connected to the inspection information interface and having a plurality of registers for temporarily storing instruction codes and data to be processed which are supplied from the external circuit inspection device, and a bus control unit for selectively connecting the external bus and the inspection control circuit to the central processing unit.
The bus control unit has an operation mode switchable between a normal mode and an inspection mode. The bus control unit connects the external bus continuously to the central processing unit in the normal mode, and switches a destination to be connected to the central processing unit from the external bus to the inspection control circuit in the inspection mode when the address of an access destination issued by the central processing unit agrees with the predetermined address of one of the registers of the inspection control circuit.
In the normal mode, the bus control unit connects the external bus continuously to the central processing unit. The central processing unit reads the instruction codes and data to be processed from an external information storage medium, and executes various data processing tasks. When the external circuit inspection device is connected to the inspection information interface to switch the operation mode of the bus control unit from the normal mode to the inspection mode, the bus control circuit switches a destination to be connected to the central processing unit from the external bus to the inspection control circuit at a given time.
The central processing unit then reads the instruction codes and data to be processed from the inspection control circuit at a predetermined time. Therefore, if desired instruction codes and data to be processed are stored into the registers of the inspection control circuit by the circuit inspection device, the central processing unit can perform a desired data processing operation in the inspection mode.
Consequently, it is possible to inspect the integrated circuit device while the integrated circuit device is being installed on a circuit board. The integrated circuit device can effect various data processing tasks, and the process of inspecting the integrated circuit device is not limited to the boundary scan test. Thus, an internal register of the central processing unit can also be inspected.
The registers of the inspection control circuit may include an instruction code register for temporarily storing an instruction code for instructing the central processing unit to effect a predetermined data processing operation, a data register for temporarily storing data to be processed by the central processing unit based on the instruction code stored by the instruction code register, and a return instruction code register for temporarily storing an instruction code to return an access destination for the central processing unit to the instruction code register.
The inspection control circuit has at least those three registers for temporarily storing an instruction code for instructing the central processing unit to effect a predetermined data processing operation, data to be processed by the central processing unit, and an instruction code to return an access destination for the central processing unit to the instruction code register. When the central processing unit reads the instruction code to return the access destination after having effected the data processing operation based on the instruction code and the data to be processed, since the access destination is returned to the instruction code register, the central processing unit effects a next data processing operation by updating the instruction codes and the data to be processed when the data processing operation has been carried out. Consequently, a number of data processing operations for inspection can be carried out by the central processing unit with a minimum required number of registers.
Alternatively, the registers of the inspection control circuit may include an instruction code register for temporarily storing an instruction code for instructing the central processing unit to effect a predetermined data processing operation, a data register for temporarily storing data to be processed by the central processing unit based on the instruction code stored by the instruction code register, and a return instruction code register for permanently storing an instruction code to return an access destination for the central processing unit to the instruction code register.
The inspection control circuit has at least those three registers for temporarily storing an instruction code for instructing the central processing unit to effect a predetermined data processing operation, and data to be processed by the central processing unit, and permanently storing an instruction code to return an access destination for the central processing unit to the instruction code register. When the central processing unit reads the instruction code to return the access destination after having effected the data processing operation based on the instruction code and the data to be processed, since the access destination is returned to the instruction code register, the central processing unit effects a next data processing operation by updating the instruction codes and the data to be processed when the data processing operation has been carried out.
Consequently, a number of data processing operations for inspection can be carried out by the central processing unit with a minimum required number of registers. In addition, the circuit inspection device does not need to store an instruction code to return the access destination in a register.
According to the present invention, a method of inspecting an integrated circuit device comprises the steps of storing an instruction code for a predetermined data processing operation in an instruction code register, storing data to be processed by a central processing unit in a data register, storing an instruction code to return an access destination in a return instruction code register, updating the instruction code stored in the instruction code register and the data stored in the data register when the central processing unit effects the predetermined data processing operation based on the instruction code stored in the instruction code register and the data stored in the data register, and returning the access destination of the central processing unit to the instruction code register based on the instruction code stored in the return instruction code register.
The instruction code for the predetermined data processing operation is stored in the instruction code register, the data to be processed by the central processing unit is stored in the data register, and the instruction code to return the access destination is stored in the return instruction code register. The access destination of the central processing unit is returned to the instruction code register after the central processing unit has effected the data processing operation based on the instruction codes and the data to be processed. Therefore, the central processing unit effects a next data processing operation by updating the instruction codes and the data to be processed when the data processing operation has been carried out.
According to the present invention, furthermore, a method of inspecting an integrated circuit device comprises the steps of storing an instruction code for a predetermined data processing operation in an instruction code register, storing data to be processed by a central processing unit in a data register, updating the instruction code stored in the instruction code register and the data stored in the data register when the central processing unit effects the predetermined data processing operation based on the instruction code stored in the instruction code register and the data stored in the data register, and returning the access destination of the central processing unit to the instruction code register based on the instruction code stored in the return instruction code register.
The instruction code for the predetermined data processing operation is stored in the instruction code register, and the data to be processed by the central processing unit is stored in the data register. The access destination of the central processing unit is returned to the instruction code register after the central processing unit has effected the data processing operation based on the instruction codes and the data to be processed. Therefore, the central processing unit effects a next data processing operation by updating the instruction codes and the data to be processed when the data processing operation has been carried out.
According to the present invention, an apparatus for an inspecting an integrated circuit device comprises a connector detachably connected to an inspection information interface, instruction code storing means for storing an instruction code for instructing a central processing unit to effect a predetermined data processing operation from the connector through the inspection information interface into an instruction code register, data storing means for storing data to be processed from the connector through the inspection information interface into a data register, and return instruction code storing means for storing an instruction code to return an access destination from the connector through the inspection information interface into a return instruction code register.
The connector is connected to the inspection information interface. The instruction code for the predetermined data processing operation is stored in the instruction code register, the data to be processed by the central processing unit is stored in the data register, and the instruction code to return the access destination is stored in the return instruction code register. The access destination of the central processing unit is returned to the instruction code register after the central processing unit has effected the data processing operation based on the instruction codes and the data to be processed. Therefore, the central processing unit effects a next data processing operation by updating the instruction codes and the data to be processed when the data processing operation has been carried out.
According to the present invention, furthermore, an apparatus for an inspecting an integrated circuit device comprises a connector detachably connected to the inspection information interface, instruction code storing means for storing the instruction code for instructing the central processing unit to effect the predetermined data processing operation from the connector through the inspection information interface into the instruction code register, and data storing means for storing the data to be processed from the connector through the inspection information interface into the data register. The connector is connected to the inspection information interface. The instruction code for the predetermined data processing operation is stored in the instruction code register, and the data to be processed by the central processing unit is stored in the data register. The access destination of the central processing unit is returned to the instruction code register after the central processing unit has effected the data processing operation based on the instruction codes and the data to be processed. Therefore, the central processing unit effects a next data processing operation by updating the instruction codes and the data to be processed when the data processing operation has been carried out.
The above and other objects, features and advantages of the present invention will become apparent from the following description with reference to the accompanying drawings which illustrate an example of the present invention.